assembly - How come my matrix is not appearing properly in the registers? -

I am working on some code for adding and subtracting metrics and replacing them in a new matrix. With this I keep them in the registers and there are value-added values ​​in MaMatrix 3, while the mamatics 4 is the deductible value. This program only works partially now and I do not understand why, why?

This is my code

  .device ATmega2560; This program adds two matrix of 5x5 size; First we start the matrix (matrix 1 and matrix 2) and then store results in the matrix, first take a point on matrix 1 and place it in the register x: R27: R26 ldi R26, less (matrix 1); Find LDi R27, low order byte of high (mammatrix 1); Find LTE R16, 50 high order bytes; Matrix 1 LDI R17, 25 Early value; To get started, the number of values ​​is matrix size 2x2, such as for loop in C (as R17> 0) as a loop: st X +, r16; Inc. R16; Next value for starting DRR 17; Subtraction count R17 breq nextinit; The first matrix started on the next RJMP loop; Now start the next matrix: LDI R26, less (matrix 2); Obtain less order byte of address LDI R27 (matrix 2); Obtain high order byte of address LDI R16, 1; Matrix 2 LDI R17, 25 Early value; Number of values ​​to get started; For loop in C (R17> as the following) Loop 1: St X +, R16; Inc. R16; Next value for starting DRR 17; Breq add_matrix; Go to the initial second matrix to add them rjmp loop 1 add_matrix:; The address of the matrix in X register ldi R26, less (mymatrix1); Find LDi R27, low order byte of high (mammatrix 1); Receive high order byte of address, address of matrix 2 in LDI 2828 in Y register, less (matrix 2); Find LDI R29, High Order (MAMATrix 2) short byte; Receive high order byte of address, address of matrix in GD register LDI 3030, low (matrix 3); Obtain less order byte of address LDI R31, High (Mammatrix 3); Receive high order byte of address, add matrix in a loop LDI R17, 4; Number of values ​​to start Loop 2: LD R, X +; Element to matrix 1 to R0 LD R1, Y +; Meet, add R0, R1 to matrix 2 to R1; Add Z Z, R0 to R0 = R0 + R1 elements; Store the results DRR17; Brake all_matrix; We add matrices rjmp loop2; If do not issue sub-metrics:; Address of matrix 1 in X register LDI R26, less (matrix 1); Find LDi R27, low order byte of high (mammatrix 1); Receive high order byte of address, address of matrix 2 in LDI 2828 in Y register, less (matrix 2); Find LDI R29, High Order (MAMATrix 2) short byte; Get high order bytes of address, register the matrix address, LDI R30, less (mametics 4); Get LME R31 low order byte, high (mametics 4); Get high order byte of address, add matrix in a loop LDI R17, 25; Number of values ​​to start Loop 3: LD R, X +; Element to matrix 1 to R0 LD R1, Y +; Get the element from matrix 2 to R1 sub-r, r1; Add Z Z, R0 to R0 = R0 + R1 elements; Store the results DRR17; Brake done; We add matrix RJMP loop 3; If not released: RJMP did; infinite loop; Initialize matrix values; Store for the end result. Dseg .org 0x000200; The Atmega 2560 data storage starts from 0x000200 mimetrics 1: .byte 4; Matrix 1 defines 4 bytes of storage for matrix 2: .byte 4; Matrix 2 defines 4 bytes of storage for matrix 3: .byte 4; Matrix defines storage by 4 bytes for matrix 4: .byte 4