macros - Limiting Make's @echo command -

I am trying to write a Macfile macro which calls two macros after the other. The first macro echos is the second and the second macro call gcc The problem is that to expand both of these macros and the result is that the GCC command just echo and can not run.

Here's an example:

  funca = @echo "foo $ 1" funcb = gcc --version funcc = $ (funny, call $ 1) $ ( Funkab, call $ 1) All: $ (call function, "bar")  

output that I get is foo bar gcc --version , But what do I need foo bar and gcc --version (preferably on a new line) Breaking the macro with a newline and a backslash does no good work, and either does not work by wrapping the gcc command in $ (shell ...) .

Any thoughts on how this should be done?

I'm not sure why you want to do this, but if you are the same If you want to run multiple shell commands in the recipe command line, then you have to separate them from any type of shell separator such as ; or & amp; << Code> $ (Call Func, "Bar") The result of string echo "foo" bar "" GCC - version so that the shell sent to the shell if you type in that shell , You will see that it will just print the string foo bar gcc --version as you want.

If you want to run multiple orders separately; For example:

  funcc = $ (Funny, call $ 1) & amp; Amp; $ (Montube, call $ 1)